/*
 *  Source:
 */

type

TElfClass enum byte (
  ELFCLASSNONE=0, //Invalid class
  ELFCLASS32=1, //32-bit objects
  ELFCLASS64=2 //64-bit objects
)

TElfEncoding enum byte (
  ELFDATANONE=0, //Invalid data encoding
  ELFDATA2LSB=1,
  ELFDATA2MSB=2
)

TEVersionB enum Byte (
  EV_NONE=0, //Invalid Version
  EV_CURRENT=1 //Current version
) 

TEOSABI enum Byte (
  ELFOSABI_NONE, //No extensions or unspecified
  ELFOSABI_HPUX, //Hewlett-Packard HP-UX
  ELFOSABI_NETBSD, //NetBSD
  ELFOSABI_GNU, //GNU
  ELFOSABI_SOLARIS, //Sun Solaris
  ELFOSABI_AIX, //AIX
  ELFOSABI_IRIX, //IRIX
  ELFOSABI_FREEBSD, //FreeBSD
  ELFOSABI_TRU64, //10, //Compaq TRU64 UNIX
  ELFOSABI_MODESTO1, //Novell Modesto
  ELFOSABI_OPENBSD2, //Open BSD
  ELFOSABI_OPENVMS3, //Open VMS
  ELFOSABI_NSK4, //Hewlett-Packard Non-Stop Kernel
  ELFOSABI_AROS5, //Amiga Research OS
  ELFOSABI_FENIXOS6, //The FenixOS highly scalable multi-core OS
  ELFOSABI_CLOUDABI7, //Nuxi CloudABI
  ELFOSABI_OPENVOS8, //Stratus Technologies OpenVOS
  ELFOSABI_ARM_AEABI = 64
 //4-255 Architecture-specific value range
)

TEABIVersion Byte

TElfIdent struc
  array[4] of char ei_magic
  TElfClass ei_class //File class
  TElfEncoding ei_encoding //Data Encoding
  TEVersionB ei_version //File Version
  TEOSABI ei_osabi //Operating system/ABI identification
  TEABIVersion ei_abiversion //ABI version
  array[7] of byte ei_pad //Padding bytes
ends

data

0 TElfIdent Ident

assert (Ident.ei_magic='ELF') and 
  ((Ident.ei_class=TElfClass.ELFCLASS32)or(Ident.ei_class=TElfClass.ELFCLASS64))
  and (Ident.ei_version=TEVersionB.EV_CURRENT);

descr ('Executable and Linkable Format.',NL,
  'Info Source: ELF.PS in (ELF11G.ZIP, www.wotsit.org).',NL,
  'Info Source: Executable and Linkable Format (ELF), Tool Interface Standards (TIS), Portable Format Specification, Version 1.1',NL,
  'Info Source: ELF-64 Object File Format, Version 1.5 Draft 2,May 27, 1998',NL,
  'Info Source: System V Application Binary Interface - DRAFT - 10 June 2013 http://www.sco.com/developers/gabi/latest/contents.html',NL,
  'Info Source: ELF.H in Linux and SUN (Some addition machine specific).',NL)

set byteorder rev=(Ident.ei_encoding=TElfEncoding.ELFDATA2MSB);

type

EHalf num+(2)
EWord num+(4)
ESWord num-(4)

%$IF Ident.ei_class=TElfClass.ELFCLASS64;
const 
  MemWB = 8;

type
EAddr num+(8)
EOff num+(8)
ER_TYPE num+(4)

%$ELSE
const 
  MemWB = 4;

type
EAddr num+(4)
EOff num+(4)                             
ER_TYPE num+(1)
%$END

const 
  MemWidth = MemWB*8;

type
EXWord num+(MemWB)
ESXWord num-(MemWB)

TEType enum EHalf (
  ET_NONE=0, //No file type
  ET_REL=1,  //Relocatable file
  ET_EXEC=2, //Executable file
  ET_DYN=3,  //Shared object file
  ET_CORE=4  //Core file
) // else Processor-specific

TEMachine enum EHalf (
  EM_NONE=0, //No machine
  EM_M32=1,  //AT&T WE 32100
  EM_SPARC=2,//SUN SPARC
  EM_386=3,  //Intel 80386
  EM_68K=4,  //Motorola 68000
  EM_88K=5,  //Motorola 88000
  EM_486=6,  /*Intel 80486 (Perhaps disused)*/
  EM_860=7,  //Intel 80860
  EM_MIPS=8, //MIPS RS3000 (officially, big-endian only)
  EM_S370=9, /* Amdahl */
  EM_MIPS_RS4_BE=10,  /* MIPS R4000 big-endian */
  EM_SPARC64=11, /* SPARC v9 (not official) 64-bit|RS6000 (in SUN`s elf.h) */
  EM_PARISC=15, /* Hewlett-Packard PA-RISC*/
  EM_nCUBE=16, /* nCUBE */
  EM_VPP500=17, /* Fujitsu VPP500 */
  EM_SPARC32PLUS = 18, /* Enhanced instruction set SPARC */
  EM_960=19, /* Intel 80960 */
  EM_PPC=20, /* PowerPC */
  EM_PPC64=21, /* 64-bit PowerPC */
  EM_S390=22, /* IBM System/390 Processor */
  EM_SPU=23, /* IBM SPU/SPC */
  EM_V800 = 36, //NEC V800
  EM_FR20 = 37, //Fujitsu FR20
  EM_RH32 = 38, //TRW RH-32
  EM_RCE = 39, //Motorola RCE
  EM_ARM = 40, //ARM 32-bit architecture (AARCH32)
  EM_ALPHA = 41, //Digital Alpha
  EM_SH = 42, //Hitachi SH
  EM_SPARCV9 = 43, //SPARC Version 9
  EM_TRICORE = 44, //Siemens TriCore embedded processor
  EM_ARC = 45, //Argonaut RISC Core, Argonaut Technologies Inc.
  EM_H8_300 = 46, //Hitachi H8/300
  EM_H8_300H = 47, //Hitachi H8/300H
  EM_H8S = 48, //Hitachi H8S
  EM_H8_500 = 49, //Hitachi H8/500
  EM_IA_64 = 50, //Intel IA-64 processor architecture
  EM_MIPS_X = 51, //Stanford MIPS-X
  EM_COLDFIRE = 52, //Motorola ColdFire
  EM_68HC12 = 53, //Motorola M68HC12
  EM_MMA = 54, //Fujitsu MMA Multimedia Accelerator
  EM_PCP = 55, //Siemens PCP
  EM_NCPU = 56, //Sony nCPU embedded RISC processor
  EM_NDR1 = 57, //Denso NDR1 microprocessor
  EM_STARCORE = 58, //Motorola Star*Core processor
  EM_ME16 = 59, //Toyota ME16 processor
  EM_ST100 = 60, //STMicroelectronics ST100 processor
  EM_TINYJ = 61, //Advanced Logic Corp. TinyJ embedded processor family
  EM_X86_64 = 62, //AMD x86-64 architecture
  EM_PDSP = 63, //Sony DSP Processor
  EM_PDP10 = 64, //Digital Equipment Corp. PDP-10
  EM_PDP11 = 65, //Digital Equipment Corp. PDP-11
  EM_FX66 = 66, //Siemens FX66 microcontroller
  EM_ST9PLUS = 67, //STMicroelectronics ST9+ 8/16 bit microcontroller
  EM_ST7 = 68, //STMicroelectronics ST7 8-bit microcontroller
  EM_68HC16 = 69, //Motorola MC68HC16 Microcontroller
  EM_68HC11 = 70, //Motorola MC68HC11 Microcontroller
  EM_68HC08 = 71, //Motorola MC68HC08 Microcontroller
  EM_68HC05 = 72, //Motorola MC68HC05 Microcontroller
  EM_SVX = 73, //Silicon Graphics SVx
  EM_ST19 = 74, //STMicroelectronics ST19 8-bit microcontroller
  EM_VAX = 75, //Digital VAX
  EM_CRIS = 76, //Axis Communications 32-bit embedded processor
  EM_JAVELIN = 77, //Infineon Technologies 32-bit embedded processor
  EM_FIREPATH = 78, //Element 14 64-bit DSP Processor
  EM_ZSP = 79, //LSI Logic 16-bit DSP Processor
  EM_MMIX = 80, //Donald Knuth's educational 64-bit processor
  EM_HUANY = 81, //Harvard University machine-independent object files
  EM_PRISM = 82, //SiTera Prism
  EM_AVR = 83, //Atmel AVR 8-bit microcontroller
  EM_FR30 = 84, //Fujitsu FR30
  EM_D10V = 85, //Mitsubishi D10V
  EM_D30V = 86, //Mitsubishi D30V
  EM_V850 = 87, //NEC v850
  EM_M32R = 88, //Mitsubishi M32R
  EM_MN10300 = 89, //Matsushita MN10300
  EM_MN10200 = 90, //Matsushita MN10200
  EM_PJ = 91, //picoJava
  EM_OPENRISC = 92, //OpenRISC 32-bit embedded processor
  EM_ARC_COMPACT = 93, //ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5)
  EM_XTENSA = 94, //Tensilica Xtensa Architecture
  EM_VIDEOCORE = 95, //Alphamosaic VideoCore processor
  EM_TMM_GPP = 96, //Thompson Multimedia General Purpose Processor
  EM_NS32K = 97, //National Semiconductor 32000 series
  EM_TPC = 98, //Tenor Network TPC processor
  EM_SNP1K = 99, //Trebia SNP 1000 processor
  EM_ST200 = 100, //STMicroelectronics (www.st.com) ST200 microcontroller
  EM_IP2K = 101, //Ubicom IP2xxx microcontroller family
  EM_MAX = 102, //MAX Processor
  EM_CR = 103, //National Semiconductor CompactRISC microprocessor
  EM_F2MC16 = 104, //Fujitsu F2MC16
  EM_MSP430 = 105, //Texas Instruments embedded microcontroller msp430
  EM_BLACKFIN = 106, //Analog Devices Blackfin (DSP) processor
  EM_SE_C33 = 107, //S1C33 Family of Seiko Epson processors
  EM_SEP = 108, //Sharp embedded microprocessor
  EM_ARCA = 109, //Arca RISC Microprocessor
  EM_UNICORE = 110, //Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
  EM_EXCESS = 111, //eXcess: 16/32/64-bit configurable embedded CPU
  EM_DXP = 112, //Icera Semiconductor Inc. Deep Execution Processor
  EM_ALTERA_NIOS2 = 113, //Altera Nios II soft-core processor
  EM_CRX = 114, //National Semiconductor CompactRISC CRX microprocessor
  EM_XGATE = 115, //Motorola XGATE embedded processor
  EM_C166 = 116, //Infineon C16x/XC16x processor
  EM_M16C = 117, //Renesas M16C series microprocessors
  EM_DSPIC30F = 118, //Microchip Technology dsPIC30F Digital Signal Controller
  EM_CE = 119, //Freescale Communication Engine RISC core
  EM_M32C = 120, //Renesas M32C series microprocessors
  //reserved = 121-130, //Reserved for future use
  EM_TSK3000 = 131, //Altium TSK3000 core
  EM_RS08 = 132, //Freescale RS08 embedded processor
  EM_SHARC = 133, //Analog Devices SHARC family of 32-bit DSP processors
  EM_ECOG2 = 134, //Cyan Technology eCOG2 microprocessor
  EM_SCORE7 = 135, //Sunplus S+core7 RISC processor
  EM_DSP24 = 136, //New Japan Radio (NJR) 24-bit DSP Processor
  EM_VIDEOCORE3 = 137, //Broadcom VideoCore III processor
  EM_LATTICEMICO32 = 138, //RISC processor for Lattice FPGA architecture
  EM_SE_C17 = 139, //Seiko Epson C17 family
  EM_TI_C6000 = 140, //The Texas Instruments TMS320C6000 DSP family
  EM_TI_C2000 = 141, //The Texas Instruments TMS320C2000 DSP family
  EM_TI_C5500 = 142, //The Texas Instruments TMS320C55x DSP family
  EM_TI_ARP32 = 143, //Texas Instruments Application Specific RISC Processor, 32bit fetch
  EM_TI_PRU = 144, //Texas Instruments Programmable Realtime Unit
  //reserved = 145-159, //Reserved for future use
  EM_MMDSP_PLUS = 160, //STMicroelectronics 64bit VLIW Data Signal Processor
  EM_CYPRESS_M8C = 161, //Cypress M8C microprocessor
  EM_R32C = 162, //Renesas R32C series microprocessors
  EM_TRIMEDIA = 163, //NXP Semiconductors TriMedia architecture family
  EM_QDSP6 = 164, //QUALCOMM DSP6 Processor
  EM_8051 = 165, //Intel 8051 and variants
  EM_STXP7X = 166, //STMicroelectronics STxP7x family of configurable and extensible RISC processors
  EM_NDS32 = 167, //Andes Technology compact code size embedded RISC processor family
  EM_ECOG1X = 168, //Cyan Technology eCOG1X family
  EM_MAXQ30 = 169, //Dallas Semiconductor MAXQ30 Core Micro-controllers
  EM_XIMO16 = 170, //New Japan Radio (NJR) 16-bit DSP Processor
  EM_MANIK = 171, //M2000 Reconfigurable RISC Microprocessor
  EM_CRAYNV2 = 172, //Cray Inc. NV2 vector architecture
  EM_RX = 173, //Renesas RX family
  EM_METAG = 174, //Imagination Technologies META processor architecture
  EM_MCST_ELBRUS = 175, //MCST Elbrus general purpose hardware architecture
  EM_ECOG16 = 176, //Cyan Technology eCOG16 family
  EM_CR16 = 177, //National Semiconductor CompactRISC CR16 16-bit microprocessor
  EM_ETPU = 178, //Freescale Extended Time Processing Unit
  EM_SLE9X = 179, //Infineon Technologies SLE9X core
  EM_L10M = 180, //Intel L10M
  EM_K10M = 181, //Intel K10M
  //reserved = 182, //Reserved for future Intel use
  EM_AARCH64 = 183, //ARM 64-bit architecture (AARCH64)
  //reserved = 184, //Reserved for future ARM use
  EM_AVR32 = 185, //Atmel Corporation 32-bit microprocessor family
  EM_STM8 = 186, //STMicroeletronics STM8 8-bit microcontroller
  EM_TILE64 = 187, //Tilera TILE64 multicore architecture family
  EM_TILEPRO = 188, //Tilera TILEPro multicore architecture family
  EM_MICROBLAZE = 189, //Xilinx MicroBlaze 32-bit RISC soft processor core
  EM_CUDA = 190, //NVIDIA CUDA architecture
  EM_TILEGX = 191, //Tilera TILE-Gx multicore architecture family
  EM_CLOUDSHIELD = 192, //CloudShield architecture family
  EM_COREA_1ST = 193, //KIPO-KAIST Core-A 1st generation processor family
  EM_COREA_2ND = 194, //KIPO-KAIST Core-A 2nd generation processor family
  EM_ARC_COMPACT2 = 195, //Synopsys ARCompact V2
  EM_OPEN8 = 196, //Open8 8-bit RISC soft processor core
  EM_RL78 = 197, //Renesas RL78 family
  EM_VIDEOCORE5 = 198, //Broadcom VideoCore V processor
  EM_78KOR = 199, //Renesas 78KOR family
  EM_56800EX = 200, //Freescale 56800EX Digital Signal Controller (DSC)
  EM_BA1 = 201, //Beyond BA1 CPU architecture
  EM_BA2 = 202, //Beyond BA2 CPU architecture
  EM_XCORE = 203, //XMOS xCORE processor family
  EM_MCHP_PIC = 204, //Microchip 8-bit PIC(r) family
  EM_INTEL205 = 205, //Reserved by Intel
  EM_INTEL206 = 206, //Reserved by Intel
  EM_INTEL207 = 207, //Reserved by Intel
  EM_INTEL208 = 208, //Reserved by Intel
  EM_INTEL209 = 209, //Reserved by Intel
  EM_KM32 = 210, //KM211 KM32 32-bit processor
  EM_KMX32 = 211, //KM211 KMX32 32-bit processor
  EM_KMX16 = 212, //KM211 KMX16 16-bit processor
  EM_KMX8 = 213, //KM211 KMX8 8-bit processor
  EM_KVARC = 214, //KM211 KVARC processor
  EM_CDP = 215, //Paneve CDP architecture family
  EM_COGE = 216, //Cognitive Smart Memory Processor
  EM_COOL = 217, //Bluechip Systems CoolEngine
  EM_NORC = 218, //Nanoradio Optimized RISC
  EM_CSR_KALIMBA = 219, //CSR Kalimba architecture family
  EM_Z80 = 220, //Zilog Z80
  EM_VISIUM = 221, //Controls and Data Services VISIUMcore processor
  EM_FT32 = 222, //FTDI Chip FT32 high performance 32-bit RISC architecture
  EM_MOXIE = 223, //Moxie processor family
  EM_AMDGPU = 224, //AMD GPU architecture
  EM_RISCV = 243, //RISC-V

  EM_ALPHA1=0x9026
)

TEVersion enum EWord (
  EV_NONE=0, //Invalid Version
  EV_CURRENT=1 //Current version
)

PProgHdrTbl ^TProgHdrTbl near=EOff
PSectionsTbl ^TSectionsTbl near=EOff

TSectionNDX enum EHalf (
  SHN_UNDEF=0,
  SHN_LORESERVE=0xff00,
//  SHN_LOPROC=0xff00,
  SHN_HIPROC=0xff1f,
  SHN_ABS=0xfff1,
  SHN_COMMON=0xfff2,
  SHN_HIRESERVE=0xffff
)

TE_Machine_Flags forward //EWord

TEHdr struc
  TEType e_type
  TEMachine e_machine
  TEVersion e_version
  EAddr e_entry     //Virt. addr of entry point (0 - No entry point)
  PProgHdrTbl e_phoff //program header table's file offset (0 - No ph. offs.)
  PSectionsTbl e_shoff     //section header table's file offset (0 - No sh. offs.)
  TE_Machine_Flags e_flags     //processor-specific flags
  EHalf e_ehsize    //Header size
  EHalf e_phentsize //size of one entry in the program header table
  EHalf e_phnum     //number of entries in the program header table
  EHalf e_shentsize //section header size
  EHalf e_shnum     //number of entries in the section header table
  TSectionNDX e_shstrndx  //section header table index of the entry associated
                    //with the section name string table (=SHN_UNDEF => No table).
  raw[] rest
ends:[@:Size=@.e_ehsize-0x10]

data
Ident:Size TEHdr Hdr

type

TSectionType enum EWord (
  SHT_NULL=0,
  SHT_PROGBITS=1,
  SHT_SYMTAB=2,
  SHT_STRTAB=3,
  SHT_RELA=4,
  SHT_HASH=5,
  SHT_DYNAMIC=6,
  SHT_NOTE=7,
  SHT_NOBITS=8,
  SHT_REL=9,
  SHT_SHLIB=10,
  SHT_DYNSYM=11,
  SHT_INIT_ARRAY=14,
  SHT_FINI_ARRAY=15,
  SHT_PREINIT_ARRAY=16,
  SHT_GROUP=17,
  SHT_SYMTAB_SHNDX=18,
  SHT_LOPROC=0x70000000,
  SHT_HIPROC=0x7fffffff,
  SHT_LOUSER=0x80000000,
  SHT_HIUSER=0xffffffff
)

TSectionFlags set MemWidth of (
  SHF_WRITE ^ 1, //The section contains data that should be writable during process execution
  SHF_ALLOC ^ 2, //The section occupies memory during process execution
  SHF_EXECINSTR ^ 4, //The section contains executable machine instructions
  SHF_MERGE ^ 0x10, //The data in the section may be merged to eliminate duplication.
    //Unless the SHF_STRINGS flag is also set, the data elements in the section are
    //of a uniform size. The size of each element is specified in the section header's
    //sh_entsize field. If the SHF_STRINGS flag is also set, the data elements consist
    //of null-terminated character strings. The size of each character is specified
    //in the section header's sh_entsize field.
  SHF_STRINGS ^ 0x20, //The data elements in the section consist of null-terminated character strings
  SHF_INFO_LINK ^ 0x40, //The sh_info field of this section header holds a section header table index
  SHF_LINK_ORDER ^ 0x80, //This flag adds special ordering requirements for link editors
  SHF_OS_NONCONFORMING ^ 0x100, //This section requires special OS-specific processing
  SHF_GROUP ^ 0x200, //This section is a member (perhaps the only one) of a section group.
    //The section must be referenced by a section of type SHT_GROUP
  SHF_TLS ^ 0x400, //This section holds Thread-Local Storage, meaning that each separate
    //execution flow has its own distinct instance of this data.
  SHF_COMPRESSED ^ 0x800 //This flag identifies a section containing compressed data.
)

// Processor Specific definitions
%$IF Hdr.e_machine=TEMachine.EM_386; //Intel 80386
  include elf_386.rfi
%$ELSIF Hdr.e_machine=TEMachine.EM_SPARC; //SPARC
  include elfSPARC.rfi
%$ELSIF Hdr.e_machine=TEMachine.EM_M32; //AT&T WE 32100
  include elf_M32.rfi
%$ELSIF Hdr.e_machine=TEMachine.EM_PPC; /* PowerPC */
  include elf_ppc.rfi
%$ELSIF Hdr.e_machine=TEMachine.EM_ARM; /* ARM 32-bit architecture (AARCH32) */
  include elf_arm.rfi
%$ELSE
 type
  TE_R_TYPE ER_TYPE
  TE_Machine_Flags EWord
%$END Machine

type
//TStrNDX/*(hSec)*/ EWord//forward
TSecNameNDX(refbase) ^pchar hideref near=EWord,ref=@+@:refbase; :
  displ=(@^,'{',@,'}')

/*
const
//TSection.sh_flags
  SHF_WRITE=0x1
  SHF_ALLOC=0x2
  SHF_EXECINSTR=0x4
  SHF_MASKPROC=0xf0000000 //Processor specific
*/

type

//TRawSectionData(Sz) raw[@:Sz]
TRawSectionData raw[]
TSymTab(Sz,hSymSec) forward
TERelTbl(Sz,hSymSec) forward
TERelATbl(Sz,hSymSec) forward
TENoteTbl(Sz) forward
TDynamicSec(Sz,hSymSec) forward
THashTblSec(Sz) forward
TGroupSec(Sz) forward

TSectionData(Sz,Tp,hSymSec) case TSectionType @:Tp of
  SHT_SYMTAB,SHT_DYNSYM: TSymTab(@:Sz,@:hSymSec)
  SHT_REL: TERelTbl(@:Sz,@:hSymSec)
  SHT_RELA: TERelATbl(@:Sz,@:hSymSec)
  SHT_NOTE: TENoteTbl(@:Sz)
  SHT_DYNAMIC: TDynamicSec(@:Sz,@:hSymSec)
  SHT_HASH: THashTblSec(@:Sz)
  SHT_GROUP: TGroupSec(@:Sz)
  else TRawSectionData(@:Sz)
endc:[@:Size=@:Sz]

PSectionData(Sz,Tp,hSymSec) ^TSectionData(@:Sz,@:Tp,@:hSymSec) nil:
  (@:Tp=TSectionType.SHT_NOBITS)or(@:Tp=TSectionType.SHT_NULL)or(@=0) near=EOff

TSection forward

TSectionsTbl array[Hdr.e_shnum] of TSection

TSectionNDXW ESWord()
TSymNDX(hSymSec) ESWord()

TSection struc
// TStrNDX/*(Hdr.e_shstrndx)*/ sh_name
  TSecNameNDX sh_name
  TSectionType sh_type
  TSectionFlags sh_flags
  EAddr sh_addr
  PSectionData(Tp=@.sh_type) sh_offset
  EXWord sh_size
  TSectionNDXW sh_link
  case @.sh_type of
    SHT_REL,SHT_RELA: TSectionNDXW
    SHT_GROUP: TSymNDX(@@.sh_link)
  else ESWord
  endc sh_info
  EXWord sh_addralign
  EXWord sh_entsize
  raw[] sh_rest
ends:[@:Size=Hdr.e_shentsize,@.sh_offset:Sz=@.sh_size,@.sh_name:refbase=
  Hdr.e_shoff^[Hdr.e_shstrndx].sh_offset exc 0x10000000,
  @.sh_offset:hSymSec=@.sh_link
]:autoname=('SEC(',INT(@:#),')_',@.sh_name^)

TSectionNDX:displ=(Hdr.e_shoff^[@].sh_name^,'{',@,'}')
TSectionNDXW:displ=(Hdr.e_shoff^[@].sh_name^,'{',@,'}')

//TStrNDX/*(hSec)*/ ^pchar - Hdr.e_shoff^[/*@:hSec*/Hdr.e_shstrndx].
//  sh_offset exc 0x10000000 hideref near=TStrNDX :displ=(@^,'{',@,'}')

type

TProgHdrType enum EWord (
  PT_NULL=0,
  PT_LOAD=1,
  PT_DYNAMIC=2,
  PT_INTERP=3,
  PT_NOTE=4,
  PT_SHLIB=5,
  PT_PHDR=6,
  PT_LOPROC=0x70000000,
  PT_HIPROC=0x7fffffff
)

TProgHdrFlags set 32 of (
  PF_X=0,
  PF_W=1,
  PF_R=2
) //??? - guess values

TProgHdrEntry struc
  TProgHdrType p_type
  EOff p_ofs
  EAddr p_vaddr
  EAddr p_paddr
  EWord p_filesz
  EWord p_memsz
  TProgHdrFlags p_flags
  EWord p_align
  raw[] p_rest
ends:[@:Size=Hdr.e_phentsize]

TProgHdrTbl array[Hdr.e_phnum] of TProgHdrEntry

//autoname
//TSection .sh_name^ SEC_

/*** Symbol tables ***/

type

TStrNDX(hSec) ^pchar hideref near=EWord,ref=@+Hdr.e_shoff^[@:hSec].sh_offset exc 0x10000000; :
  displ=(@^,'{',@,'}')

set byteorder norm
type bit
  TBit2 num+(2)
  TBit4 num+(4)
  TBit6 num+(6)

//symbol's binding determines the linkage visibility and behavior
//st_info shr 4

TE_ST_Bind enum TBit4 (
  STB_LOCAL=0, //Local symbols are not visible outside the file
  STB_GLOBAL=1, //Global symbols are visible to all files
  STB_WEAK=2, //Like global but with lower precedence
  STB_LOPROC=13, //Processor-specific
  STB_HIPROC=15  //
)

//symbol's type provides a general classi\256cation for the associated entity
//st_info and 0xF
TE_ST_Type enum TBit4 (
  STT_NOTYPE=0, //Type is not specified
  STT_OBJECT=1, //Data object (variable,array,etc.)
  STT_FUNC=2, //Function or other executable code
  STT_SECTION=3, //Section (for relocation and almost always are STB_LOCAL)
  STT_FILE=4, //Name of the source file
  STT_COMMON=5, //The symbol labels an uninitialized common block
  STT_TLS=6, //The symbol specifies a Thread-Local Storage entity.
  STT_LOPROC=13, //Processor-specific
  STT_HIPROC=15  //
)

TE_ST_Info struc
  TE_ST_Type Typ
  TE_ST_Bind Bind
ends            

TST_OTHER_Visibility enum TBit2 (
  STV_DEFAULT=0,
  STV_INTERNAL=1,
  STV_HIDDEN=2,
  STV_PROTECTED=3
)

TE_ST_Other struc
  TST_OTHER_Visibility Visibility
  TBit6 Rest
ends            

set byteorder rev=(Ident.ei_encoding=TElfEncoding.ELFDATA2MSB);

type
%$IF Ident.ei_class=TElfClass.ELFCLASS64;
TSymEntry(hSymSec) struc
// TStrNDX(@:hSymSec) st_name
  TSecNameNDX(Hdr.e_shoff^[@:hSymSec].sh_offset exc 0x10000000) st_name
  TE_ST_Info st_info
  TE_ST_Other st_other
  TSectionNDX st_sh_ndx
  EAddr st_value
  EWord st_size
ends                                                              

TE_R_SYM(hSymSec) num+(4)
%$ELSE
TSymEntry(hSymSec) struc
// TStrNDX(@:hSymSec) st_name
  TSecNameNDX(Hdr.e_shoff^[@:hSymSec].sh_offset exc 0x10000000) st_name
  EAddr st_value
  EWord st_size
  TE_ST_Info st_info
  TE_ST_Other st_other
  TSectionNDX st_sh_ndx
ends                                                              

TE_R_SYM(hSymSec) num+(3)
%$END

TSymTab(Sz,hSymSec) array of TSymEntry(@:hSymSec):[@:Size=@:Sz]

TSymNDX:displ=(Hdr.e_shoff^[@:hSymSec].sh_offset^.SHT_SYMTAB[@].st_name,'{',@,'}')
TE_R_SYM:displ=(Hdr.e_shoff^[@:hSymSec].sh_offset^.SHT_SYMTAB[@].st_name,'{',@,'}')

/*** Relocation ***/

TE_R_INFO(hSymSec) struc byteorder
  TE_R_TYPE Typ
  TE_R_SYM(@:hSymSec) hSym
ends

type
TERel(hSymSec) struc
  EAddr r_ofs
  TE_R_INFO(@:hSymSec)/*EWord*/ r_info
ends

TERelTbl(Sz,hSymSec) array of TERel(@:hSymSec):[@:Size=@:Sz]

TERelA(hSymSec) struc
  EAddr r_ofs
  TE_R_INFO(@:hSymSec)/*EWord*/ r_info
  ESWord r_addend
ends

TERelATbl(Sz,hSymSec) array of TERelA(@:hSymSec):[@:Size=@:Sz]

/*** Notes ***/

TNoteRec struc
  EWord NameSz
  EWord DescSz
  EWord Typ
  array[(@.NameSz+7)and 0xFFFFFFF8] of Char Name
  array[(@.DescSz+7)and 0xFFFFFFF8] of Char Desc
ends

TENoteTbl(Sz) array of TNoteRec:[@:Size=@:Sz]

/*** Dynamic ***/

TDynRecTag enum ESWord (
DT_NULL=0, //ignored | end of array
DT_NEEDED=1, //d_val
DT_PLTRELSZ=2,//d_val
DT_PLTGOT=3, //d_ptr
DT_HASH=4, //d_ptr
DT_STRTAB=5, //d_ptr |address of the string table
DT_SYMTAB=6, //d_ptr
DT_RELA=7, //d_ptr
DT_RELASZ=8, //d_val
DT_RELAENT=9, //d_val
DT_STRSZ=10, //d_val
DT_SYMENT=11, //d_val
DT_INIT=12, //d_ptr
DT_FINI=13, //d_ptr
DT_SONAME=14, //d_val
DT_RPATH=15, //d_val
DT_SYMBOLIC=16, //ignored
DT_REL=17, //d_ptr
DT_RELSZ=18, //d_val
DT_RELENT=19, //d_val
DT_PLTREL=20, //d_val
DT_DEBUG=21, //d_ptr
DT_TEXTREL=22, //ignored
DT_JMPREL=23, //d_ptr
DT_LOPROC=0x70000000,//unspecified
DT_HIPROC=0x7fffffff //unspecified
)

TEDynRec(hSymSec) struc
  TDynRecTag d_tag
  case @.d_tag of
   DT_NEEDED,DT_SONAME,DT_RPATH: //TStrNDX(@@:hSymSec)
     TSecNameNDX(Hdr.e_shoff^[@@:hSymSec].sh_offset /*exc 0x10000000*/)
  else EWord
  endc d_val
ends

TEDynTbl(hSymSec) array of TEDynRec(@:hSymSec) ?@.d_tag=TDynRecTag.DT_NULL;

TDynamicSec(Sz,hSymSec) struc
  TEDynTbl(@:hSymSec) Tbl
  raw[] rest
ends:[@:Size=@:Sz]

/*** Hash table ***/

THashTblSec(Sz) struc
  ESWord nbucket
  ESWord nchain
  array[@.nbucket] of ESWord bucket
  array[@.nchain] of ESWord chain
  raw[] rest
ends:[@:Size=@:Sz]

/* Groups */

TGroupSecFlags set 32 of (
  GRP_COMDAT ^ 0x1
  //GRP_MASKOS 0x0ff00000 //reserved for operating system-specific semantics
  //GRP_MASKPROC 0xf0000000 //reserved for processor-specific semantics
)

TGroupSec(Sz) struc
  TGroupSecFlags Flags
  array of TSectionNDXW Parts
ends:[@:Size=@:Sz]

Other specifications.

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